MMU (Memory Management Unit)

The MMU memory management chip, officially designated the 8722, is the cornerstone of the 128 system. In fact, the MMU is what makes most of the 128’s special features possible. The MMU was designed by Commodore’s engineers specifically to support the 128’s multiple operating modes and elaborate memory banking scheme. It is the MMU which determines which microprocessor, 8502 or Z80, has control of the computer. When the 8502 is in control, the MMU determines whether the computer operates in 128 mode or 64 mode. The 128 hardware includes many times more elements than can simultaneously fit in the 64K address space of the 8502 or Z80 microprocessors. The MMU chip also determines which memory resources are visible to the processsor at any given time.

Most BASIC programming can be done without understanding the inner workings of the MMU, simply by using the available standard bank configurations. However, a thorough knowledge of the MMU is essential for taking full advantage of all the 128’s features.

The 17 registers of the MMU are unusual in that they are divided into two separate groups at different memory locations. The first 12 appear in the I/O block at 54528-54539/$D500-$D50B, while the other 5 appear at 65280-65284/$FF00-$FF04. This second set of MMU registers is special in that it appears in all memory configurations. There is no way to make the processor see anything other than the MMU registers at those locations while the 128 is in 128 mode. Next table lists the MMU registers. A detailed description of each register follows.

See also

• $D500-$D50B - Mmu Chip Registers
• $FF00-$FF04 - Mmu Chip Registers